#include "DCBC_XRT.orl"


START: 2006/11/25.07:11:00 {SEQ: XRT_SW_Reset_Memory_Dump_Manu_Exp_Edit_by_Hand_SEQ; }

START: 2006/11/25.08:18:00 {SEQ: XRT_SW_Reset_Memory_Dump_Manu_Exp_Edit_by_Hand_SEQ; }

START: 2006/11/25.09:55:00 {SEQ: XRT_SW_Reset_Memory_Dump_Manu_Exp_Edit_by_Hand_SEQ; }

START: 2006/11/25.10:51:30 {SEQ: XRT_XBP_Simple_SEQ; }

START: 2006/11/25.12:59:30 {SEQ: XRT_SSQ_6_SEQ; }

START: 2006/11/25.13:09:30 {SEQ: XRT_XBP_Simple_6_SEQ; }

START: 2006/11/25.18:59:30 {SEQ: XRT_SSQ_7_SEQ; }

START: 2006/11/25.19:09:30 {SEQ: XRT_XBP_Simple_8_SEQ; }

START: 2006/11/26.00:59:30 {SEQ: XRT_SSQ_8_SEQ; }

START: 2006/11/26.01:09:30 {SEQ: XRT_XBP_Simple_9_SEQ; }

START: 2006/11/26.06:59:30 {SEQ: XRT_SSQ_9_SEQ; }

START: 2006/11/26.07:09:30 {SEQ: XRT_XBP_Simple_10_SEQ; }

START: 2006/11/26.12:59:30 {SEQ: XRT_SSQ_10_SEQ; }

START: 2006/11/26.13:09:30 {SEQ: XRT_XBP_Simple_11_SEQ; }

START: 2006/11/26.18:59:30 {SEQ: XRT_SSQ_11_SEQ; }

START: 2006/11/26.19:09:30 {SEQ: XRT_XBP_Simple_12_SEQ; }

START: 2006/11/27.00:59:30 {SEQ: XRT_SSQ_12_SEQ; }

START: 2006/11/27.01:09:30 {SEQ: XRT_XBP_Simple_13_SEQ; }

START: 2006/11/27.07:24:30 {SEQ: XRT_SSQ_13_SEQ; }

START: 2006/11/27.07:34:30 {SEQ: XRT_XBP_Simple_14_SEQ; }

DEFSEQ(OP): XRT_NOP_SEQ{
}

DEFSEQ(REAL): XRT_SW_Reset_Memory_Dump_Manu_Exp_Edit_by_Hand_SEQ {
	C. : "" ;
	NP_C. : "***** XRT Start *******" ;
	NP_C. : "" ;
	CMD : MDP_XRT_CTRL_MANU ;
	NP_C. : "----------- [MDP_XRT_CTRL_MODE] = MANU ?       OK / NG _____         " ;
	NP_C. : "" ;
	NP_C. : "" ;
	NP_C.:"*********************" ;
	NP_C.:" XRT SWV/DATV CHANGE " ;
	NP_C.:"*********************" ;
	NP_C. : "" ;
	NP_C.:"         <XRT1,XRTD_STS> [XRTD_S_S/W_MODE]       = _____ (record)" ;
	NP_C.:"         <    ,XRTD_STS> [XRTD_E_CUR_SWV]        = _____ (record)" ;
	NP_C.:"         <    ,XRTD_STS> [XRTD_E_CUR_DATV]       = _____ (record)" ;
	NP_C.:"         <    ,XRTD_STS> [XRTD_E_DEF_SWV]        = _____ (record)" ;
	NP_C.:"         <    ,XRTD_STS> [XRTD_E_DEF_DATV]       = _____ (record)" ;
	NP_C.:"         <----,XRTD_STS> [XRTD_P_P28IC]          = _____ (record) ";
	NP_C.:"" ;
  	CMD:XRT_STBY ;
	NP_C.:"         <XRT1,XRTD_STS> [XRTD_S_S/W_MODE]       = STBY  P / F " ;
   	C.:"" ;
  	CMD:XRT_SAFEHOLD ;
	NP_C.:"         <XRT1,XRTD_STS> [XRTD_S_S/W_MODE]       = SFHD  P / F " ;
   	C.:"" ;
  	CMD:XRT_MAINTENANCE ;
	NP_C.:"         <XRT1,XRTD_STS> [XRTD_S_S/W_MODE]       = MTNC  P / F " ;
	NP_C.:"" ;
	NP_C.:"" ;
	NP_C.:"<--- Change SWV=0 (V4.1a) --->" ;
   	C.:"DATV=0" ;
  	CMD:XRT_S/W_SEL_RESET 00 ;
	NP_C.:"         <XRT1,XRTD_STS> [XRTD_S_S/W_MODE]          = STBY  P / F ";
	NP_C.:"         <    ,XRTD_STS> [XRTD_E_CUR_SWV]           = 0     P / F " ;
	NP_C.:"         <    ,XRTD_STS> [XRTD_E_CUR_DATV]          = 0     P / F " ;
	NP_C.:"         <----,XRTD_STS> [XRTD_E_WDOG_RST] (+0)     = _____ P / F ";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_DSCRT_RST](+0)     = _____ P / F ";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_OTH_RST]  (+1)     = _____ P / F ";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_FW1_POS]           = _____ (record) ";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_FW2_POS]           = _____ (record) ";
	NP_C.:"         <----,XRTD_STS> [XRTD_P_P28IC] (decrease)  = _____ P / F ";
	C.:"     If XRTD_P_P28IC does not decrease, then go to MCU_RESET sequence. ";
   	C.:"" ;
  	CMD:MDP_STS_XRD_ERR_CLR;
	NP_C.:"         <MDP ,XRT>      [MDP_STS_XRD_ERR]       = OK    P / F ";
   	C.:"" ;
   	C.:"" ;
	NP_C.:"*****************" ;
	NP_C.:" XRT MEMORY DUMP    " ;
	NP_C.:"*****************" ;
	NP_C.:"";
	NP_C.:"         <XRT1,XRTD_STS> [XRTD_S_S/W_MODE]       = STBY  P / F ";
	NP_C.:"         <XRT1,XRTD_STS> [XRTD_S_S/W_MODE]       = _____ (record)" ;
	NP_C.:"         <    ,XRTD_STS> [XRTD_E_CUR_SWV]        = _____ (record)" ;
	NP_C.:"         <    ,XRTD_STS> [XRTD_E_CUR_DATV]       = _____ (record)" ;
	NP_C.:"";
  	CMD:XRT_SAFEHOLD ;
	NP_C.:"         <XRT1,XRTD_STS> [XRTD_S_S/W_MODE]       = SFHD  P / F " ;
   	C.:"" ;
  	CMD:XRT_MAINTENANCE ;
	NP_C.:"         <XRT1,XRTD_STS> [XRTD_S_S/W_MODE]       = MTNC  P / F " ;
	NP_C.:"" ;
	NP_C.:"" ;
   	C.:"<--- Memory Dump Instruction RAM : 0x010000-0x01FFFD --->" ;
  	CMD:XRT_MEMORY_DUMP 01 00 00 FF FE 00 ;
	NP_C.:"" ;
   	C.:"" ;
   	C.:"<--- Memory Dump RAM Data        : 0x020000-0x02FFFD --->" ;
  	CMD:XRT_MEMORY_DUMP 02 00 00 FF FE 00 ;
	NP_C.:"" ;
   	C.:"" ;
  	CMD:XRT_STBY ;
	NP_C.:"         <XRT1,XRTD_STS> [XRTD_S_S/W_MODE]       = STBY  P / F " ;
   	C.:"" ;
  	CMD: XRT_OPERATE ;
	NP_C.:"         <XRT1,XRTD_STS> [XRTD_S_S/W_MODE]       = OPER  P / F " ;
   	C.:"" ;
   	C.:"" ;
	NP_C.:"*********************" ;
	NP_C.:" XRT MANUAL EXPOSURE " ;
	NP_C.:"*********************" ;
        C. : "Alpoly, Open, VLS-closed, Norm, 4-sec, Cal, 1x1, DPCM" ;
        CMD : MDP_XRT_EXP_PAR_SET 10 00 17 10 80 80 20 20 03 28 00 ;
        NP_C. : "      <XRT1,XRT_STS > [MDP_XRT_MANU_TBL#]      = set       P / F" ;
        NP_C. : "      <----,MEM     > [MDP_IMG_XRT_QUE_SIZ]    < 70        P / F" ;
        CMD : MDP_XRT_EXP_STRT ;
        NP_C. : "      <----,XRT_STS > [MDP_XRT_CMD_MCR_ID]     = ________  P / F" ;
   	C.:"" ;
   	C.:"" ;
	NP_C.:"************************" ;
	NP_C.:" XRT TABLE OBSERVATIONS " ;
	NP_C.:"************************" ;
   	C.:"" ;
	CMD:MDP_XRT_MODE_OBSV;
	NP_C.:"         <MDP ,XRT>      [MDP_XRT_MODE]          = OBSV?     OK / NG_____ ";
   	C.:"" ;
	CMD: MDP_XRT_CTRL_MANU;
	CMD: MDP_XRT_FLD_DIS; 
	CMD: MDP_XRT_AEC_RESET; 
	CMD: MDP_XRT_QT_PROG_SET 0c ;
	CMD: MDP_XRT_CTRL_AUTO ;
   	C.:"" ;
   	C.:"" ;
   	C.:"" ;
	NP_C.:"****************************" ;
	NP_C.:" XRT MCU RESET (IF NEEDED!) " ; 
	NP_C.:"****************************" ; 
	NP_C.:"";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_WDOG_RST]       = _____ (record) ";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_DSCRT_RST]      = _____ (record) ";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_OTH_RST]        = _____ (record) ";
   	C.:"";
  	CMD:XRT_DISCCMD_ENA;
	NP_C.:"         <XRT1,XRTD_STS> [HK1_XRTD_DC_ENA]       = ENA   P / F ";
   	C.:"";
  	CMD:XRT_MCU_RESET;
	NP_C.:"         <XRT1,XRTD_STS> [XRTD_S_S/W_MODE]       = STBY  P / F ";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_CUR_SWV]        = _____ P / F ";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_CUR_DATV]       = _____ P / F ";
	NP_C.:"         <----,XRTD_STS> [XRTD_D_DSCRT_RST]      = RESET P / F ";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_WDOG_RST] (+0)  = _____ P / F ";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_DSCRT_RST](+1)  = _____ P / F ";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_OTH_RST]  (+0)  = _____ P / F ";
   	C.:"";
  	CMD:XRT_DISCCMD_DIS;
	NP_C.:"         <XRT1,XRTD_STS> [HK1_XRTD_DC_ENA]       = DIS   P / F ";
   	C.:"";
  	CMD:MDP_STS_XRD_ERR_CLR;
	NP_C.:"         <MDP ,XRT>      [MDP_STS_XRD_ERR]       = OK    P / F ";
	NP_C.:"";
   	C.:"";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_FW1_POS]           = _____ (record) ";
	NP_C.:"         <----,XRTD_STS> [XRTD_E_FW2_POS]           = _____ (record) ";
	NP_C.:"         <----,XRTD_STS> [XRTD_P_P28IC] (decrease)  = _____ P / F ";
	NP_C.:"     If XRTD_P_P28IC does not decrease, then no further commands.  Remain in STBY. ";
	NP_C.:"     If XRTD_P_P28IC does decrease, then go back to MEMORY DUMP Sequence. ";
   	C.:"";
   	C.:"";
	NP_C. : "" ;
	C. : "" ;
	C. : "****************" ;
	C. : " EMERGENCY CASE " ;
	C. : "****************" ;
	C. : "" ;
	ENTRY: DCBC XRT_DIS_TABLE_OBS_SEQ ; 
	C. : "" ;
	NP_C. : "***** XRT End *******" ;
	NP_C. : "" ;
}

DEFSEQ(OP): XRT_XBP_Simple_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_ENA_417_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLRCTRL_ENA_415_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_RESET_402_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_AEC_RESET_428_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_449_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_406_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_SSQ_6_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_DIS_445_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_444_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_446_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_419_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_XBP_Simple_6_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_ENA_417_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_449_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_406_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_SSQ_7_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_DIS_445_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_444_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_446_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_419_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_XBP_Simple_8_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_ENA_417_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_449_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_406_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_SSQ_8_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_DIS_445_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_444_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_446_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_419_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_XBP_Simple_9_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_ENA_417_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_449_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_406_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_SSQ_9_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_DIS_445_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_444_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_446_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_419_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_XBP_Simple_10_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_ENA_417_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_449_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_406_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_SSQ_10_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_DIS_445_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_444_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_446_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_419_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_XBP_Simple_11_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_ENA_417_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_449_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_406_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_SSQ_11_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_DIS_445_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_444_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_446_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_419_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_XBP_Simple_12_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_ENA_417_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_449_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_406_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_SSQ_12_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_DIS_445_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_444_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_446_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_419_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_XBP_Simple_13_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_ENA_417_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_449_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_406_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_SSQ_13_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_DIS_445_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_444_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_446_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_419_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_XBP_Simple_14_SEQ {
	OG : XRT_CTRL_MANU_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_ENA_417_OG ;
	INTERVAL: 2.0 ;
		OG : XRT_QT_PROG_SET_449_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_406_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OG) : XRT_CTRL_MANU_400_OG {
	NUMBER : 400 ;
	CMD : MDP_XRT_CTRL_MANU ;
}

DEFSEQ(OG) : XRT_FL_PROG_SET_401_OG {
	NUMBER : 401 ;
	CMD : MDP_XRT_FL_PROG_SET 0e ; 
}

DEFSEQ(OG) : XRT_FLD_RESET_402_OG {
	NUMBER : 402 ;
	CMD : MDP_XRT_FLD_RESET ;
}

DEFSEQ(OG) : XRT_CTRL_AUTO_403_OG {
	NUMBER : 403 ;
	CMD : MDP_XRT_CTRL_AUTO ;
}

DEFSEQ(OG) : XRT_QT_PROG_SET_404_OG {
	NUMBER : 404 ;
	CMD : MDP_XRT_QT_PROG_SET 10 ; 
}

DEFSEQ(OG) : XRT_FOCUS_POSITION_405_OG {
	NUMBER : 405 ;
	CMD : XRT_FOCUS_POSITION fe 12 00 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_406_OG { 	NUMBER : 406 ;
	CMD : MDP_XRT_FL_PROG_SET 07 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_407_OG {
	NUMBER : 407 ;
	CMD : MDP_XRT_FL_PROG_SET 13 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_408_OG {
	NUMBER : 408 ;
	CMD : MDP_XRT_QT_PROG_SET 11 ; 
}

DEFSEQ(OG) : XRT_FOCUS_POSITION_409_OG {
	NUMBER : 409 ;
	CMD : XRT_FOCUS_POSITION fe 33 00 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_410_OG {
	NUMBER : 410 ;
	CMD : MDP_XRT_QT_PROG_SET 14 ; 
}

DEFSEQ(OG) : XRT_FOCUS_POSITION_411_OG {
	NUMBER : 411 ;
	CMD : XRT_FOCUS_POSITION fe 55 00 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_412_OG {
	NUMBER : 412 ;
	CMD : MDP_XRT_QT_PROG_SET 12 ; 
}

DEFSEQ(OG) : XRT_FOCUS_POSITION_413_OG {
	NUMBER : 413 ;
	CMD : XRT_FOCUS_POSITION fe 76 00 ; 
}

DEFSEQ(OG) : XRT_ROI_SECOND_HALF_414_OG {
	NUMBER : 414 ;
	CMD : MDP_XRT_ROI_SET 08 80 80 10 10 ; 
	CMD : MDP_XRT_ROI_SET 09 80 80 08 08 ; 
	CMD : MDP_XRT_ROI_SET 0a 80 80 06 06 ; 
	CMD : MDP_XRT_ROI_SET 0b 80 80 04 04 ; 
	CMD : MDP_XRT_ROI_SET 0c 40 80 10 10 ; 
	CMD : MDP_XRT_ROI_SET 0d c0 80 10 10 ; 
	CMD : MDP_XRT_ROI_SET 0e 80 80 06 06 ; 
	CMD : MDP_XRT_ROI_SET 0f 80 80 04 04 ; 
}

DEFSEQ(OG) : XRT_FLRCTRL_ENA_415_OG {
	NUMBER : 415 ;
	CMD : MDP_XRT_FLRCTRL_ENA ;
}

DEFSEQ(OG) : XRT_FLRCTRL_DIS_416_OG {
	NUMBER : 416 ;
	CMD : MDP_XRT_FLRCTRL_DIS ;
}

DEFSEQ(OG) : XRT_FLD_ENA_417_OG {
	NUMBER : 417 ;
	CMD : MDP_XRT_FLD_ENA ;
}

DEFSEQ(OG) : XRT_FOCUS_POSITION_418_OG {
	NUMBER : 418 ;
	CMD : XRT_FOCUS_POSITION fe f9 00 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_419_OG { 	NUMBER : 419 ;
	CMD : MDP_XRT_FL_PROG_SET 0b ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_420_OG {
	NUMBER : 420 ;
	CMD : MDP_XRT_QT_PROG_SET 0a ; 
}

DEFSEQ(OG) : XRT_Custom_421_OG {
	NUMBER : 421 ;
}

DEFSEQ(OG) : XRT_QT_PROG_SET_422_OG {
	NUMBER : 422 ;
	CMD : MDP_XRT_QT_PROG_SET 0d ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_423_OG {
	NUMBER : 423 ;
	CMD : MDP_XRT_FL_PROG_SET 0d ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_424_OG {
	NUMBER : 424 ;
	CMD : MDP_XRT_QT_PROG_SET 06 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_425_OG {
	NUMBER : 425 ;
	CMD : MDP_XRT_QT_PROG_SET 05 ; 
}

DEFSEQ(OG) : XRT_FOCUS_POSITION_426_OG {
	NUMBER : 426 ;
	CMD : XRT_FOCUS_POSITION ff 19 00 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_427_OG {
	NUMBER : 427 ;
	CMD : MDP_XRT_FL_PROG_SET 02 ; 
}

DEFSEQ(OG) : XRT_AEC_RESET_428_OG {
	NUMBER : 428 ;
	CMD : MDP_XRT_AEC_RESET ;
}

DEFSEQ(OG) : XRT_DUMP_XRTTBL_429_OG {
	NUMBER : 429 ;
	CMD : MDP_DUMP_XRTTBL 00 00 00 3A D4 ; 
}

DEFSEQ(OG) : XRT_ROI_FIRST_HALF_430_OG {
	NUMBER : 430 ;
	CMD : MDP_XRT_ROI_SET 01 08 08 06 06 ; 
	CMD : MDP_XRT_ROI_SET 01 24 8e 08 08 ; 
	CMD : MDP_XRT_ROI_SET 02 1c 92 06 06 ; 
	CMD : MDP_XRT_ROI_SET 03 14 96 04 04 ; 
	CMD : MDP_XRT_ROI_SET 04 80 80 06 06 ; 
	CMD : MDP_XRT_ROI_SET 05 80 80 20 20 ; 
	CMD : MDP_XRT_ROI_SET 06 80 80 04 10 ; 
	CMD : MDP_XRT_ROI_SET 07 80 80 10 04 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_431_OG {
	NUMBER : 431 ;
	CMD : MDP_XRT_QT_PROG_SET 03 ; 
}

DEFSEQ(OG) : XRT_FOCUS_POSITION_432_OG {
	NUMBER : 432 ;
	CMD : XRT_FOCUS_POSITION fe 97 00 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_433_OG {
	NUMBER : 433 ;
	CMD : MDP_XRT_FL_PROG_SET 08 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_434_OG {
	NUMBER : 434 ;
	CMD : MDP_XRT_FL_PROG_SET 03 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_435_OG {
	NUMBER : 435 ;
	CMD : MDP_XRT_QT_PROG_SET 01 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_436_OG {
	NUMBER : 436 ;
	CMD : MDP_XRT_FL_PROG_SET 01 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_437_OG {
	NUMBER : 437 ;
	CMD : MDP_XRT_FL_PROG_SET 14 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_438_OG {
	NUMBER : 438 ;
	CMD : MDP_XRT_QT_PROG_SET 04 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_439_OG {
	NUMBER : 439 ;
	CMD : MDP_XRT_FL_PROG_SET 04 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_440_OG {
	NUMBER : 440 ;
	CMD : MDP_XRT_QT_PROG_SET 08 ; 
}

DEFSEQ(OG) : XRT_UPLOAD_XRTTBL_441_OG {
	NUMBER : 441 ;
}

DEFSEQ(OG) : XRT_QT_PROG_SET_442_OG {
	NUMBER : 442 ;
	CMD : MDP_XRT_QT_PROG_SET 02 ; 
}

DEFSEQ(OG) : XRT_FOCUS_POSITION_443_OG {
	NUMBER : 443 ;
	CMD : XRT_FOCUS_POSITION fe b8 00 ; 
}

DEFSEQ(OG) : XRT_ARS_DIS_444_OG {
	NUMBER : 444 ;
	CMD : MDP_XRT_ARS_DIS ;
}

DEFSEQ(OG) : XRT_FLD_DIS_445_OG {
	NUMBER : 445 ;
	CMD : MDP_XRT_FLD_DIS ;
}

DEFSEQ(OG) : XRT_QT_PROG_SET_446_OG { 	NUMBER : 446 ;
	CMD : MDP_XRT_QT_PROG_SET 0b ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_447_OG {
	NUMBER : 447 ;
	CMD : MDP_XRT_QT_PROG_SET 0e ; 
}

DEFSEQ(OG) : XRT_FOCUS_POSITION_448_OG {
	NUMBER : 448 ;
	CMD : XRT_FOCUS_POSITION fe d8 00 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_449_OG { 	NUMBER : 449 ;
	CMD : MDP_XRT_QT_PROG_SET 0c ; 
}