#include "DCBC_XRT.orl" START: 2007/01/09.10:11:35 {SEQ: XRT_Table_Upload_SEQ; } START: 2007/01/09.11:11:30 {SEQ: XRT_East-West_Alignment_SEQ; } START: 2007/01/09.14:30:00 {SEQ: XRT_Stop_SEQ; } START: 2007/01/09.16:09:30 {SEQ: XRT_Polar_Plume_-_loop_multi_SEQ; } START: 2007/01/09.22:00:00 {SEQ: XRT_Synoptic_-_Al/poly_pair_15_SEQ; } START: 2007/01/09.22:10:00 {SEQ: XRT_AR_Evolution_Alpoly_No_Darks_13_SEQ; } START: 2007/01/10.04:01:30 {SEQ: XRT_Synoptic_-_Al/poly_pair_20_SEQ; } START: 2007/01/10.04:11:30 {SEQ: XRT_MHD_Waves_Al/poly_to_thick_Al_2_SEQ; } START: 2007/01/10.10:17:00 {SEQ: XRT_Synoptic_-_Al/poly_pair_21_SEQ; } START: 2007/01/10.10:27:00 {SEQ: XRT_AR_Evolution_Alpoly_No_Darks_14_SEQ; } START: 2007/01/10.11:01:30 {SEQ: XRT_Synoptic_-_Al/poly_pair_22_SEQ; } DEFSEQ(OP): XRT_NOP_SEQ{ } DEFSEQ(REAL): XRT_Table_Upload_SEQ { NP_C. : "" ; NP_C. : "************ XRT Start ************" ; NP_C. : "" ; CMD : MDP_XRT_CTRL_MANU ; CMD : MDP_XRT_MODE_STBY ; NP_C. : "---------- Success Verify ? OK / NG____" ; NP_C. : "" ; NP_C. : "XRT Obs. Table Upload" ; ENTRY: RAM MDP_OBS_X 291 291 ; NP_C. : "----------- Number of Commands = 86 bytes ? OK / NG _____ " ; NP_C. : "" ; CMD : MDP_DUMP_XRTTBL 00 00 00 3A D4 ; NP_C. : "----------- Comparison Check ? OK / ERR _____ " ; NP_C. : "" ; CMD : MDP_XRT_ROI_SET 01 08 08 06 06 ; NP_CMD : MDP_XRT_ROI_SET 02 24 8e 08 08 ; NP_CMD : MDP_XRT_ROI_SET 03 1c 92 06 06 ; NP_CMD : MDP_XRT_ROI_SET 04 14 96 04 04 ; NP_CMD : MDP_XRT_ROI_SET 05 80 80 06 06 ; NP_CMD : MDP_XRT_ROI_SET 06 80 80 20 20 ; NP_CMD : MDP_XRT_ROI_SET 07 80 a0 10 0c ; NP_CMD : MDP_XRT_ROI_SET 08 80 80 10 04 ; NP_CMD : MDP_XRT_ROI_SET 09 80 88 10 06 ; NP_CMD : MDP_XRT_ROI_SET 0a 80 80 08 08 ; NP_CMD : MDP_XRT_ROI_SET 0b 80 90 10 08 ; NP_CMD : MDP_XRT_ROI_SET 0c 80 80 04 04 ; NP_CMD : MDP_XRT_ROI_SET 0d 40 80 10 10 ; NP_CMD : MDP_XRT_ROI_SET 0e c0 80 10 10 ; NP_CMD : MDP_XRT_ROI_SET 0f 80 80 06 06 ; NP_CMD : MDP_XRT_ROI_SET 10 80 80 04 04 ; NP_C. : "" ; C. : "All OK? Yes--> Please Proceed. / No --> Stop here. " ; NP_C. : "" ; CMD : MDP_XRT_MODE_OBSV ; NP_C. : "---------- Success Verify ? OK / NG____" ; NP_C. : "" ; NP_C. : "************ XRT End ************" ; } DEFSEQ(OP): XRT_East-West_Alignment_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_DIS_445_OG ; INTERVAL: 2.0 ; OG : XRT_FLRCTRL_DIS_416_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_404_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_437_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_Stop_SEQ { OG : XRT_CTRL_MANU_400_OG ; } DEFSEQ(OP): XRT_Polar_Plume_-_loop_multi_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_449_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_425_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_Synoptic_-_Al/poly_pair_15_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_DIS_445_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_446_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_433_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_AR_Evolution_Alpoly_No_Darks_13_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_DIS_445_OG ; INTERVAL: 2.0 ; OG : XRT_AEC_RESET_428_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_412_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_423_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_Synoptic_-_Al/poly_pair_20_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_DIS_445_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_446_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_433_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_MHD_Waves_Al/poly_to_thick_Al_2_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_AEC_RESET_428_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_444_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_447_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_Synoptic_-_Al/poly_pair_21_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_DIS_445_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_446_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_433_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_AR_Evolution_Alpoly_No_Darks_14_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_DIS_445_OG ; INTERVAL: 2.0 ; OG : XRT_AEC_RESET_428_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_412_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_423_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_Synoptic_-_Al/poly_pair_22_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_DIS_445_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_446_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_433_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OG) : XRT_CTRL_MANU_400_OG { NUMBER : 400 ; CMD : MDP_XRT_CTRL_MANU ; } DEFSEQ(OG) : XRT_FOCUS_STEPS_401_OG { NUMBER : 401 ; CMD : XRT_FOCUS_STEPS ec 78 00 ; } DEFSEQ(OG) : XRT_MEMORY_DUMP_402_OG { NUMBER : 402 ; CMD : XRT_MEMORY_DUMP 00 00 00 00 01 00 ; } DEFSEQ(OG) : XRT_CTRL_AUTO_403_OG { NUMBER : 403 ; CMD : MDP_XRT_CTRL_AUTO ; } DEFSEQ(OG) : XRT_QT_PROG_SET_404_OG { NUMBER : 404 ; CMD : MDP_XRT_QT_PROG_SET 0d ; } DEFSEQ(OG) : XRT_OPERATIONS_405_OG { NUMBER : 405 ; CMD : XRT_OPERATE ; } DEFSEQ(OG) : XRT_VLS_ENA/DIS_406_OG { NUMBER : 406 ; CMD : XRT_VLS_ENA ; } DEFSEQ(OG) : XRT_ROI_SET_407_OG { NUMBER : 407 ; CMD : MDP_XRT_ROI_SET 01 04 04 08 08 ; } DEFSEQ(OG) : XRT_FL_PROG_SET_408_OG { NUMBER : 408 ; CMD : MDP_XRT_FL_PROG_SET 05 ; } DEFSEQ(OG) : XRT_Custom_409_OG { NUMBER : 409 ; CMD : XRT_OPHTR_OFF ; } DEFSEQ(OG) : XRT_VLS_STEPS_410_OG { NUMBER : 410 ; CMD : XRT_VLS_STEP 00 22 00 ; } DEFSEQ(OG) : XRT_DIAGNOSTIC_411_OG { NUMBER : 411 ; CMD : XRT_DIAGNOSTIC ; } DEFSEQ(OG) : XRT_QT_PROG_SET_412_OG { NUMBER : 412 ; CMD : MDP_XRT_QT_PROG_SET 09 ; } DEFSEQ(OG) : XRT_Custom_413_OG { NUMBER : 413 ; CMD : XRT_DISCCMD_DIS ; } DEFSEQ(OG) : XRT_DOOR_ENABLE_414_OG { NUMBER : 414 ; CMD : XRT_DOOR_ENABLE ; } DEFSEQ(OG) : XRT_STATUS_MODE_SET_415_OG { NUMBER : 415 ; CMD : XRT_STS_MODE_NORMAL ; } DEFSEQ(OG) : XRT_FLRCTRL_DIS_416_OG { NUMBER : 416 ; CMD : MDP_XRT_FLRCTRL_DIS ; } DEFSEQ(OG) : XRT_BAKEOUT_417_OG { NUMBER : 417 ; CMD : XRT_BAKEOUT ; } DEFSEQ(OG) : XRT_Custom_418_OG { NUMBER : 418 ; CMD : XRT_DISCCMD_ENA ; } DEFSEQ(OG) : XRT_UPLOAD_XRTTBL_419_OG { NUMBER : 419 ; } DEFSEQ(OG) : XRT_Custom_420_OG { NUMBER : 420 ; CMD : XRT_OPHTR_ON ; } DEFSEQ(OG) : XRT_ARS_ENA_421_OG { NUMBER : 421 ; CMD : MDP_XRT_ARS_ENA ; } DEFSEQ(OG) : XRT_ARS_DIS_422_OG { NUMBER : 422 ; CMD : MDP_XRT_ARS_DIS ; } DEFSEQ(OG) : XRT_FL_PROG_SET_423_OG { NUMBER : 423 ; CMD : MDP_XRT_FL_PROG_SET 09 ; } DEFSEQ(OG) : XRT_Custom_424_OG { NUMBER : 424 ; CMD : XRT_FW1_STEP_CCW ; } DEFSEQ(OG) : XRT_FL_PROG_SET_425_OG { NUMBER : 425 ; CMD : MDP_XRT_FL_PROG_SET 01 ; } DEFSEQ(OG) : XRT_Custom_426_OG { NUMBER : 426 ; CMD : XRT_FW_1_STATUS_LSB ; } DEFSEQ(OG) : XRT_QT_PROG_SET_427_OG { NUMBER : 427 ; CMD : MDP_XRT_QT_PROG_SET 11 ; } DEFSEQ(OG) : XRT_AEC_RESET_428_OG { NUMBER : 428 ; CMD : MDP_XRT_AEC_RESET ; } DEFSEQ(OG) : XRT_DOOR_OPERATE_A_429_OG { NUMBER : 429 ; CMD : XRT_DOOR_OPERATE_A cf ; } DEFSEQ(OG) : XRT_DOOR_OPERATE_B_430_OG { NUMBER : 430 ; CMD : XRT_DOOR_OPERATE_B cd ; } DEFSEQ(OG) : XRT_QT_PROG_SET_431_OG { NUMBER : 431 ; CMD : MDP_XRT_QT_PROG_SET 05 ; } DEFSEQ(OG) : XRT_S/W_SEL_&_RESET_432_OG { NUMBER : 432 ; CMD : XRT_S/W_SEL_RESET e0 ; } DEFSEQ(OG) : XRT_FL_PROG_SET_433_OG { NUMBER : 433 ; CMD : MDP_XRT_FL_PROG_SET 07 ; } DEFSEQ(OG) : XRT_S/W_SET_DEFAULT_434_OG { NUMBER : 434 ; CMD : XRT_S/W_SET_DFLT 70 ; } DEFSEQ(OG) : XRT_FOCUS_ENA/DIS_435_OG { NUMBER : 435 ; CMD : XRT_FOCUS_ENA ; } DEFSEQ(OG) : XRT_CRITICALCMD_436_OG { NUMBER : 436 ; CMD : XRT_DOOR_OPENING ; } DEFSEQ(OG) : XRT_FL_PROG_SET_437_OG { NUMBER : 437 ; CMD : MDP_XRT_FL_PROG_SET 0d ; } DEFSEQ(OG) : XRT_FOCUS_POSITION_438_OG { NUMBER : 438 ; CMD : XRT_FOCUS_POSITION 01 bc 00 ; } DEFSEQ(OG) : XRT_SAFEHOLD_439_OG { NUMBER : 439 ; CMD : XRT_SAFEHOLD ; } DEFSEQ(OG) : XRT_DUMP_XRTTBL_440_OG { NUMBER : 440 ; CMD : MDP_DUMP_XRTTBL 00 00 00 3A D4 ; } DEFSEQ(OG) : XRT_MAINTENANCE_441_OG { NUMBER : 441 ; CMD : XRT_MAINTENANCE ; } DEFSEQ(OG) : XRT_STANDBY_442_OG { NUMBER : 442 ; CMD : XRT_STBY ; } DEFSEQ(OG) : XRT_Custom_443_OG { NUMBER : 443 ; CMD : XRT_FW_1_STATUS_MSB ; } DEFSEQ(OG) : XRT_QT_PROG_SET_444_OG { NUMBER : 444 ; CMD : MDP_XRT_QT_PROG_SET 08 ; } DEFSEQ(OG) : XRT_FLD_DIS_445_OG { NUMBER : 445 ; CMD : MDP_XRT_FLD_DIS ; } DEFSEQ(OG) : XRT_QT_PROG_SET_446_OG { NUMBER : 446 ; CMD : MDP_XRT_QT_PROG_SET 07 ; } DEFSEQ(OG) : XRT_FL_PROG_SET_447_OG { NUMBER : 447 ; CMD : MDP_XRT_FL_PROG_SET 08 ; } DEFSEQ(OG) : XRT_FOCUS_RECALIBRATE_448_OG { NUMBER : 448 ; CMD : XRT_FOCUS_RECAL ; } DEFSEQ(OG) : XRT_QT_PROG_SET_449_OG { NUMBER : 449 ; CMD : MDP_XRT_QT_PROG_SET 01 ; }