#include "DCBC_XRT.orl" START: 2007/02/01.09:48:35 {SEQ: XRT_NORMAL-STATUS_and_FW1-SCRIPT_SEQ; } START: 2007/02/01.09:48:40 {SEQ: XRT_MCU-RESET_and_Recovery_and_Table_Upload_SEQ; } START: 2007/02/01.09:50:00 {SEQ: XRT_Memory_Dump--Emergency_Option_SEQ; } START: 2007/02/01.10:49:54 {SEQ: XRT_STOP_SEQ; } START: 2007/02/01.10:51:30 {SEQ: XRT_AR_1min_cadence_with_context_5_SEQ; } START: 2007/02/01.11:59:54 {SEQ: XRT_STOP_2_SEQ; } START: 2007/02/01.12:01:30 {SEQ: XRT_Synoptic_SEQ; } START: 2007/02/01.12:11:30 {SEQ: XRT_AR_1min_cadence_with_context_4_SEQ; } START: 2007/02/01.18:00:24 {SEQ: XRT_STOP_3_SEQ; } START: 2007/02/01.18:02:00 {SEQ: XRT_Synoptic_2_SEQ; } START: 2007/02/01.18:12:00 {SEQ: XRT_AR_1min_cadence_with_context_3_SEQ; } START: 2007/02/01.23:47:54 {SEQ: XRT_STOP_4_SEQ; } START: 2007/02/01.23:49:30 {SEQ: XRT_Synoptic_3_SEQ; } START: 2007/02/01.23:59:30 {SEQ: XRT_AR_1min_cadence_with_context_SEQ; } START: 2007/02/02.05:48:54 {SEQ: XRT_STOP_5_SEQ; } START: 2007/02/02.05:50:30 {SEQ: XRT_Synoptic_4_SEQ; } START: 2007/02/02.06:00:30 {SEQ: XRT_AR_1min_cadence_with_context_2_SEQ; } START: 2007/02/02.10:39:54 {SEQ: XRT_STOP_6_SEQ; } START: 2007/02/02.10:41:30 {SEQ: XRT_SSQ_SEQ; } DEFSEQ(OP): XRT_NOP_SEQ{ } DEFSEQ(REAL): XRT_NORMAL-STATUS_and_FW1-SCRIPT_SEQ { NP_C. : " THIS IS OUR *FIRST* OPTION FOR TONIGHT'S COMMANDING" ; NP_C. : "************ XRT START ************" ; NP_C. : "" ; NP_C. : "*********************" ; NP_C. : " First, explicitly set MODE_OBSV and set STATUS_MODE to NORM." ; CMD : MDP_XRT_MODE_OBSV ; CMD : XRT_STS_MODE_NORMAL ; NP_C. : "" ; NP_C. : "Return to Standby" ; CMD : XRT_STBY ; NP_C. : " [XRTD_S_S/W_MODE] = STBY P / F" ; NP_C. : "********************" ; NP_C. : "XRT Filter Wheel 1 Disable Procedure" ; NP_C. : "********************" ; NP_C. : "Enter Diagnostic Mode (Expect to be in STBY before this)" ; CMD : XRT_DIAGNOSTIC ; NP_C. : " [XRTD_S_S/W_MODE] = DIAG P / F" ; C. : "Execute XRT_SCRIPT command" ; CMD : XRT_SCRIPT 00 03 02 7E 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FF ; NP_C. : "Verify that XRT_SCRIPT command completed: P / F" ; C. : "" ; NP_C. : "Return to Standby" ; CMD : XRT_STBY ; NP_C. : " [XRTD_S_S/W_MODE] = STBY P / F" ; CMD : XRT_OPERATE ; NP_C. : " [XRT_S_S/W_MODE] = OPER P / F" ; NP_C. : "" ; NP_C. : "" ; CMD : MDP_XRT_CTRL_MANU ; CMD : MDP_XRT_MODE_STBY ; NP_C. : "----------- Success Verify ? OK / NG____" ; C. : "" ; NP_C. : "XRT Obs. Table Upload" ; ENTRY: RAM MDP_OBS_X 291 291 ; NP_C. : "----------- Number of Commands = 16 bytes ? OK / NG _____ " ; NP_C. : "" ; CMD : MDP_DUMP_XRTTBL 00 00 00 3A D4 ; C. : "" ; NP_C. : "----------- Comparison Check ? OK / ERR ____ " ; C. : "" ; NP_C. : "" ; NP_CMD : MDP_XRT_QT_PROG_SET 02 ; CMD : MDP_XRT_FL_PROG_SET 02 ; NP_CMD : MDP_XRT_ARS_DIS ; NP_CMD : MDP_XRT_AEC_RESET ; NP_CMD : MDP_XRT_FLD_RESET ; NP_CMD : MDP_XRT_FLD_ENA ; NP_CMD : MDP_XRT_FLRCTRL_DIS ; NP_C. : "---------- Success Verify ? OK / NG ____" ; NP_C. : "" ; NP_C. : "" ; C. : "All OK? Yes--> Please Proceed. / No --> Stop here." ; NP_C. : "" ; CMD : MDP_XRT_MODE_OBSV ; NP_CMD : MDP_XRT_CTRL_AUTO ; NP_C. : "---------- Success Verify ? OK / NG ____" ; NP_C. : "" ; } DEFSEQ(REAL): XRT_MCU-RESET_and_Recovery_and_Table_Upload_SEQ { NP_C. : " THIS IS OUR *SECOND* OPTION FOR TONIGHT'S COMMANDING" ; NP_C. : "*********************" ; NP_C. : "XRT MEMORY DUMP" ; NP_C. : "*********************" ; NP_C. : "" ; NP_C. : " [XRTD_S_S/W_MODE] = _____ (record)" ; NP_C. : " < ,XRTD_STS> [XRTD_E_CUR_SWV] = _____ (record)" ; NP_C. : " < ,XRTD_STS> [XRTD_E_CUR_DATV] = _____ (record)" ; NP_C. : "" ; CMD : XRT_SAFEHOLD ; NP_C. : " [XRTD_S_S/W_MODE] = SFHD P / F" ; C. : "" ; CMD : XRT_MAINTENANCE ; NP_C. : " [XRTD_S_S/W_MODE] = MTNC P / F" ; NP_C. : "" ; NP_C. : "" ; C. : "<---Memory Dump Instruction RAM: 0x010000-0x01FFFD--->" ; CMD : XRT_MEMORY_DUMP 01 00 00 ff fe 00 ; NP_C. : "" ; C. : "" ; C. : "<---Memory Dump RAM Data: 0x020000-0x02FFFD--->" ; CMD : XRT_MEMORY_DUMP 02 00 00 ff fe 00 ; NP_C. : "" ; C. : "" ; CMD : XRT_STBY ; NP_C. : " [XRTD_S_S/W_MODE] = STBY P / F" ; C. : "" ; NP_C. : "" ; NP_C. : "XRT MCU RESET" ; NP_C. : "*********************" ; NP_C. : "" ; NP_C. : " <----,XRTD_STS> [XRTD_E_WDOG_RST] = _____ (record)" ; NP_C. : " <----,XRTD_STS> [XRTD_E_DSCRT_RST] = _____ (record)" ; NP_C. : " <----,XRTD_STS> [XRTD_E_OTH_RST] = _____ (record)" ; C. : "" ; CMD : XRT_DISCCMD_ENA ; NP_C. : " [HK1_XRTD_DC_ENA] = ENA P / F" ; C. : "" ; NP_CMD : XRT_MCU_RESET ; NP_C. : " [XRTD_S_S/W_MODE] = STBY P / F" ; NP_C. : " <----,XRTD_STS> [XRTD_E_CUR_SWV] = _____ P / F" ; NP_C. : " <----,XRTD_STS> [XRTD_E_CUR_DATV] = _____ P / F" ; NP_C. : " <----,XRTD_STS> [XRTD_D_DSCRT_RST] = RESET P / F" ; NP_C. : " <----,XRTD_STS> [XRTD_E_WDOG_RST](+0) = _____ P / F" ; NP_C. : " <----,XRTD_STS> [XRTD_E_DSCRT_RST](+1) = _____ P / F" ; NP_C. : " <----,XRTD_STS> [XRTD_E_OTH_RST](+0) = _____ P / F" ; C. : "" ; CMD : XRT_DISCCMD_DIS ; NP_C. : " [HK1_XRTD_DC_ENA] = DIS P / F" ; C. : "" ; NP_C. : "********************" ; NP_C. : "MDP_STS_XRD_ERR flag, clearance procedure" ; NP_C. : "********************" ; CMD : MDP_STS_XRD_ERR_CLR ; NP_C. : " [MDP_STS_XRD_ERR] = OK P / F" ; C. : "" ; C. : "" ; NP_C. : "********************" ; NP_C. : "XRT Filter Wheel 1 Disable Procedure" ; NP_C. : "********************" ; NP_C. : "Enter Diagnostic Mode (Expect to be in STBY before this)" ; CMD : XRT_DIAGNOSTIC ; NP_C. : " [XRTD_S_S/W_MODE] = DIAG P / F" ; NP_C. : "Enter Extended Status Mode" ; CMD : XRT_STS_MODE_EXT ; C. : "Execute XRT_SCRIPT command" ; CMD : XRT_SCRIPT 00 03 02 7E 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FF ; NP_C. : "Verify that XRT_SCRIPT command completed: P / F" ; C. : "" ; C. : "Return to Normal Status Mode" ; CMD : XRT_STS_MODE_NORMAL ; C. : "Return to Standby" ; CMD : XRT_STBY ; NP_C. : " [XRTD_S_S/W_MODE] = STBY P / F" ; NP_C. : "*********************************" ; C. : "XRT Focus Recalibration and Focus Position" ; NP_C. : "*********************************" ; C. : "" ; CMD : XRT_OPERATE ; NP_C. : " [XRT_S_S/W_MODE] = OPER P / F" ; NP_C. : "" ; NP_C. : "" ; NP_C. : "*********************************" ; NP_C. : "XRT Focus Recalibration" ; NP_C. : "*********************************" ; NP_C. : " [XRT_S_S/W_MODE] = OPER" ; NP_C. : " [XRTD_D_FOCUS_CAL] = NON" ; CMD : XRT_FOCUS_RECAL ; NP_C. : "During the execution of the Focus_Recal, one should see the following:" ; NP_C. : " [XRTD_B_EXPOSE_BUSY] = BUSY" ; NP_C. : " [XRTD_B_BUSY_MECH] = FOC" ; NP_C. : " [XRT_D_CMD_BUSY] = BUSY" ; NP_C. : "After the completion of the Focus_Recal, one should see the following:" ; NP_C. : " [XRTD_B_EXPOSE_BUSY] = READY" ; NP_C. : " [XRTD_D_FOCUS_CAL] = CAL" ; NP_C. : " [XRT_E_FOC_POS] = F8 2E" ; NP_C. : " [XRT_S_S/W_MODE] = OPER" ; CMD : XRT_FOCUS_POSITION fe 97 00 ; NP_C. : "During the execution of the Focus_Position, one should see the following:" ; NP_C. : " [XRTD_B_EXPOSE_BUSY] = BUSY" ; NP_C. : " [XRTD_B_BUSY_MECH] = FOC" ; NP_C. : " [XRT_D_CMD_BUSY] = BUSY" ; NP_C. : "After the completion of the Focus_Position, one should see the following:" ; NP_C. : " [XRTD_B_EXPOSE_BUSY] = READY" ; NP_C. : " [XRTD_D_FOCUS_CAL] = CAL" ; NP_C. : " [XRT_E_FOC_POS] = -361 (Fe 97 00)" ; NP_C. : " [XRT_S_S/W_MODE] = OPER" ; NP_C. : "" ; CMD : MDP_XRT_CTRL_MANU ; CMD : MDP_XRT_MODE_STBY ; NP_C. : "----------- Success Verify ? OK / NG____" ; NP_C. : "" ; NP_C. : "XRT Obs. Table Upload" ; ENTRY: RAM MDP_OBS_X 291 291 ; NP_C. : "" ; CMD : MDP_DUMP_XRTTBL 00 00 00 3A D4 ; C. : "" ; NP_C. : "----------- Comparison Check ? OK / ERR ____ " ; NP_C. : "" ; NP_C. : "" ; NP_CMD : MDP_XRT_QT_PROG_SET 02 ; NP_CMD : MDP_XRT_FL_PROG_SET 02 ; NP_CMD : MDP_XRT_ARS_DIS ; NP_CMD : MDP_XRT_AEC_RESET ; NP_CMD : MDP_XRT_FLD_RESET ; NP_CMD : MDP_XRT_FLD_ENA ; NP_CMD : MDP_XRT_FLRCTRL_DIS ; NP_C. : "---------- Success Verify ? OK / NG ____" ; NP_C. : "" ; NP_C. : "" ; C. : "All OK? Yes--> Please Proceed. / No --> Stop here." ; NP_C. : "" ; CMD : MDP_XRT_MODE_OBSV ; NP_CMD : MDP_XRT_CTRL_AUTO ; NP_C. : "---------- Success Verify ? OK / NG ____" ; NP_C. : "" ; NP_C. : "************ XRT END ***********" ; } DEFSEQ(REAL): XRT_Memory_Dump--Emergency_Option_SEQ { NP_C. : "*********************" ; NP_C. : "XRT MEMORY DUMP" ; NP_C. : "*********************" ; NP_C. : "" ; NP_C. : " [XRTD_S_S/W_MODE] = STBY P / F" ; NP_C. : " [XRTD_S_S/W_MODE] = _____ (record)" ; NP_C. : " < ,XRTD_STS> [XRTD_E_CUR_SWV] = _____ (record)" ; NP_C. : " < ,XRTD_STS> [XRTD_E_CUR_DATV] = _____ (record)" ; NP_C. : "" ; CMD : XRT_SAFEHOLD ; NP_C. : " [XRTD_S_S/W_MODE] = SFHD P / F" ; C. : "" ; CMD : XRT_MAINTENANCE ; NP_C. : " [XRTD_S_S/W_MODE] = MTNC P / F" ; NP_C. : "" ; NP_C. : "" ; C. : "<---Memory Dump Instruction RAM: 0x010000-0x01FFFD--->" ; CMD : XRT_MEMORY_DUMP 01 00 00 ff fe 00 ; NP_C. : "" ; C. : "" ; C. : "<---Memory Dump RAM Data: 0x020000-0x02FFFD--->" ; CMD : XRT_MEMORY_DUMP 02 00 00 ff fe 00 ; NP_C. : "" ; C. : "" ; CMD : XRT_STBY ; NP_C. : " [XRTD_S_S/W_MODE] = STBY P / F" ; C. : "" ; NP_C. : "" ; } DEFSEQ(OP): XRT_STOP_SEQ { OG : XRT_CTRL_MANU_400_OG ; } DEFSEQ(OP): XRT_AR_1min_cadence_with_context_5_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_418_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_421_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_ENA_424_OG ; INTERVAL: 2.0 ; OG : XRT_FLRCTRL_DIS_416_OG ; INTERVAL: 2.0 ; OG : XRT_AEC_RESET_428_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_STOP_2_SEQ { OG : XRT_CTRL_MANU_400_OG ; } DEFSEQ(OP): XRT_Synoptic_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FOCUS_POSITION_426_OG ; INTERVAL: 20.0 ; OG : XRT_QT_PROG_SET_439_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_440_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_DIS_445_OG ; INTERVAL: 2.0 ; OG : XRT_FLRCTRL_DIS_416_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; INTERVAL: 72.0 ; OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FOCUS_POSITION_442_OG ; } DEFSEQ(OP): XRT_AR_1min_cadence_with_context_4_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_418_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_421_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_ENA_424_OG ; INTERVAL: 2.0 ; OG : XRT_FLRCTRL_DIS_416_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_STOP_3_SEQ { OG : XRT_CTRL_MANU_400_OG ; } DEFSEQ(OP): XRT_Synoptic_2_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FOCUS_POSITION_426_OG ; INTERVAL: 20.0 ; OG : XRT_QT_PROG_SET_439_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_440_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_DIS_445_OG ; INTERVAL: 2.0 ; OG : XRT_FLRCTRL_DIS_416_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; INTERVAL: 72.0 ; OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FOCUS_POSITION_442_OG ; } DEFSEQ(OP): XRT_AR_1min_cadence_with_context_3_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_418_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_421_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_ENA_424_OG ; INTERVAL: 2.0 ; OG : XRT_FLRCTRL_DIS_416_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_STOP_4_SEQ { OG : XRT_CTRL_MANU_400_OG ; } DEFSEQ(OP): XRT_Synoptic_3_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FOCUS_POSITION_426_OG ; INTERVAL: 20.0 ; OG : XRT_QT_PROG_SET_439_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_440_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_DIS_445_OG ; INTERVAL: 2.0 ; OG : XRT_FLRCTRL_DIS_416_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; INTERVAL: 72.0 ; OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FOCUS_POSITION_442_OG ; } DEFSEQ(OP): XRT_AR_1min_cadence_with_context_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_418_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_421_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_ENA_424_OG ; INTERVAL: 2.0 ; OG : XRT_FLRCTRL_DIS_416_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_STOP_5_SEQ { OG : XRT_CTRL_MANU_400_OG ; } DEFSEQ(OP): XRT_Synoptic_4_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FOCUS_POSITION_426_OG ; INTERVAL: 20.0 ; OG : XRT_QT_PROG_SET_439_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_440_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_DIS_445_OG ; INTERVAL: 2.0 ; OG : XRT_FLRCTRL_DIS_416_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; INTERVAL: 72.0 ; OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_FOCUS_POSITION_442_OG ; } DEFSEQ(OP): XRT_AR_1min_cadence_with_context_2_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_418_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_421_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_ENA_424_OG ; INTERVAL: 2.0 ; OG : XRT_FLRCTRL_DIS_416_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OP): XRT_STOP_6_SEQ { OG : XRT_CTRL_MANU_400_OG ; } DEFSEQ(OP): XRT_SSQ_SEQ { OG : XRT_CTRL_MANU_400_OG ; INTERVAL: 2.0 ; OG : XRT_QT_PROG_SET_446_OG ; INTERVAL: 2.0 ; OG : XRT_FL_PROG_SET_433_OG ; INTERVAL: 2.0 ; OG : XRT_ARS_DIS_422_OG ; INTERVAL: 2.0 ; OG : XRT_FLD_DIS_445_OG ; INTERVAL: 2.0 ; OG : XRT_FLRCTRL_DIS_416_OG ; INTERVAL: 2.0 ; OG : XRT_CTRL_AUTO_403_OG ; } DEFSEQ(OG) : XRT_CTRL_MANU_400_OG { NUMBER : 400 ; CMD : MDP_XRT_CTRL_MANU ; } DEFSEQ(OG) : XRT_QT_PROG_SET_401_OG { NUMBER : 401 ; CMD : MDP_XRT_QT_PROG_SET 02 ; } DEFSEQ(OG) : XRT_FL_PROG_SET_402_OG { NUMBER : 402 ; CMD : MDP_XRT_FL_PROG_SET 02 ; } DEFSEQ(OG) : XRT_CTRL_AUTO_403_OG { NUMBER : 403 ; CMD : MDP_XRT_CTRL_AUTO ; } DEFSEQ(OG) : XRT_FLD_RESET_404_OG { NUMBER : 404 ; CMD : MDP_XRT_FLD_RESET ; } DEFSEQ(OG) : XRT_Custom_405_OG { NUMBER : 405 ; CMD : MDP_STS_XRD_ERR_CLR ; } DEFSEQ(OG) : XRT_QT_PROG_SET_406_OG { NUMBER : 406 ; CMD : MDP_XRT_QT_PROG_SET 04 ; } DEFSEQ(OG) : XRT_FL_PROG_SET_407_OG { NUMBER : 407 ; CMD : MDP_XRT_FL_PROG_SET 04 ; } DEFSEQ(OG) : XRT_OPERATIONS_408_OG { NUMBER : 408 ; CMD : XRT_OPERATE ; } DEFSEQ(OG) : XRT_FOCUS_RECALIBRATE_409_OG { NUMBER : 409 ; CMD : XRT_FOCUS_RECAL ; } DEFSEQ(OG) : XRT_FL_PROG_SET_410_OG { NUMBER : 410 ; CMD : MDP_XRT_FL_PROG_SET 0b ; } DEFSEQ(OG) : XRT_MEMORY_DUMP_411_OG { NUMBER : 411 ; CMD : XRT_MEMORY_DUMP 00 00 00 00 ff fe ; } DEFSEQ(OG) : XRT_QT_PROG_SET_412_OG { NUMBER : 412 ; CMD : MDP_XRT_QT_PROG_SET 09 ; } DEFSEQ(OG) : XRT_FL_PROG_SET_413_OG { NUMBER : 413 ; CMD : MDP_XRT_FL_PROG_SET 0c ; } DEFSEQ(OG) : XRT_QT_PROG_SET_414_OG { NUMBER : 414 ; CMD : MDP_XRT_QT_PROG_SET 14 ; } DEFSEQ(OG) : XRT_FL_PROG_SET_415_OG { NUMBER : 415 ; CMD : MDP_XRT_FL_PROG_SET 14 ; } DEFSEQ(OG) : XRT_FLRCTRL_DIS_416_OG { NUMBER : 416 ; CMD : MDP_XRT_FLRCTRL_DIS ; } DEFSEQ(OG) : XRT_QT_PROG_SET_417_OG { NUMBER : 417 ; CMD : MDP_XRT_QT_PROG_SET 06 ; } DEFSEQ(OG) : XRT_QT_PROG_SET_418_OG { NUMBER : 418 ; CMD : MDP_XRT_QT_PROG_SET 0e ; } DEFSEQ(OG) : XRT_FL_PROG_SET_419_OG { NUMBER : 419 ; CMD : MDP_XRT_FL_PROG_SET 06 ; } DEFSEQ(OG) : XRT_FL_PROG_SET_420_OG { NUMBER : 420 ; CMD : MDP_XRT_FL_PROG_SET 05 ; } DEFSEQ(OG) : XRT_FL_PROG_SET_421_OG { NUMBER : 421 ; CMD : MDP_XRT_FL_PROG_SET 0e ; } DEFSEQ(OG) : XRT_ARS_DIS_422_OG { NUMBER : 422 ; CMD : MDP_XRT_ARS_DIS ; } DEFSEQ(OG) : XRT_FL_PROG_SET_423_OG { NUMBER : 423 ; CMD : MDP_XRT_FL_PROG_SET 09 ; } DEFSEQ(OG) : XRT_FLD_ENA_424_OG { NUMBER : 424 ; CMD : MDP_XRT_FLD_ENA ; } DEFSEQ(OG) : XRT_FL_PROG_SET_425_OG { NUMBER : 425 ; CMD : MDP_XRT_FL_PROG_SET 01 ; } DEFSEQ(OG) : XRT_FOCUS_POSITION_426_OG { NUMBER : 426 ; NP_CMD : XRT_FOCUS_POSITION ff aa 00 ; } DEFSEQ(OG) : XRT_QT_PROG_SET_427_OG { NUMBER : 427 ; CMD : MDP_XRT_QT_PROG_SET 0a ; } DEFSEQ(OG) : XRT_AEC_RESET_428_OG { NUMBER : 428 ; CMD : MDP_XRT_AEC_RESET ; } DEFSEQ(OG) : XRT_FL_PROG_SET_429_OG { NUMBER : 429 ; CMD : MDP_XRT_FL_PROG_SET 0a ; } DEFSEQ(OG) : XRT_SAFEHOLD_430_OG { NUMBER : 430 ; CMD : XRT_SAFEHOLD ; } DEFSEQ(OG) : XRT_QT_PROG_SET_431_OG { NUMBER : 431 ; CMD : MDP_XRT_QT_PROG_SET 05 ; } DEFSEQ(OG) : XRT_MAINTENANCE_432_OG { NUMBER : 432 ; CMD : XRT_MAINTENANCE ; } DEFSEQ(OG) : XRT_FL_PROG_SET_433_OG { NUMBER : 433 ; CMD : MDP_XRT_FL_PROG_SET 07 ; } DEFSEQ(OG) : XRT_QT_PROG_SET_434_OG { NUMBER : 434 ; CMD : MDP_XRT_QT_PROG_SET 10 ; } DEFSEQ(OG) : XRT_FL_PROG_SET_435_OG { NUMBER : 435 ; CMD : MDP_XRT_FL_PROG_SET 10 ; } DEFSEQ(OG) : XRT_QT_PROG_SET_436_OG { NUMBER : 436 ; CMD : MDP_XRT_QT_PROG_SET 0f ; } DEFSEQ(OG) : XRT_MEMORY_DUMP_437_OG { NUMBER : 437 ; CMD : XRT_MEMORY_DUMP 00 01 00 00 ff fe ; } DEFSEQ(OG) : XRT_FL_PROG_SET_438_OG { NUMBER : 438 ; CMD : MDP_XRT_FL_PROG_SET 0f ; } DEFSEQ(OG) : XRT_QT_PROG_SET_439_OG { NUMBER : 439 ; CMD : MDP_XRT_QT_PROG_SET 03 ; } DEFSEQ(OG) : XRT_FL_PROG_SET_440_OG { NUMBER : 440 ; CMD : MDP_XRT_FL_PROG_SET 03 ; } DEFSEQ(OG) : XRT_S/W_SET_DEFAULT_441_OG { NUMBER : 441 ; CMD : XRT_S/W_SET_DFLT 00 ; } DEFSEQ(OG) : XRT_FOCUS_POSITION_442_OG { NUMBER : 442 ; CMD : XRT_FOCUS_POSITION fe 97 00 ; } DEFSEQ(OG) : XRT_STANDBY_443_OG { NUMBER : 443 ; CMD : XRT_STBY ; } DEFSEQ(OG) : XRT_QT_PROG_SET_444_OG { NUMBER : 444 ; CMD : MDP_XRT_QT_PROG_SET 08 ; } DEFSEQ(OG) : XRT_FLD_DIS_445_OG { NUMBER : 445 ; CMD : MDP_XRT_FLD_DIS ; } DEFSEQ(OG) : XRT_QT_PROG_SET_446_OG { NUMBER : 446 ; CMD : MDP_XRT_QT_PROG_SET 07 ; } DEFSEQ(OG) : XRT_FL_PROG_SET_447_OG { NUMBER : 447 ; CMD : MDP_XRT_FL_PROG_SET 08 ; } DEFSEQ(OG) : XRT_QT_PROG_SET_448_OG { NUMBER : 448 ; CMD : MDP_XRT_QT_PROG_SET 0b ; } DEFSEQ(OG) : XRT_QT_PROG_SET_449_OG { NUMBER : 449 ; CMD : MDP_XRT_QT_PROG_SET 01 ; }