#include "DCBC_XRT.orl"


START: 2007/05/01.09:43:15 {SEQ: XRT_Table_Upload_and_FW1_CL_Test_SEQ; }

START: 2007/05/01.10:32:54 {SEQ: XRT_AR_on_disk_5_SEQ; }

START: 2007/05/01.17:57:54 {SEQ: XRT_Synoptic_SEQ; }

START: 2007/05/01.18:07:54 {SEQ: XRT_AR_on_disk_6_SEQ; }

START: 2007/05/02.05:42:54 {SEQ: XRT_Synoptic_2_SEQ; }

START: 2007/05/02.05:52:54 {SEQ: XRT_AR_on_disk_7_SEQ; }

START: 2007/05/02.11:09:54 {SEQ: XRT_SSQ_SEQ; }

DEFSEQ(OP): XRT_NOP_SEQ{
}

DEFSEQ(REAL): XRT_Table_Upload_and_FW1_CL_Test_SEQ {
	NP_C. : "" ;
	NP_C. : "************ XRT START ************" ;
	NP_C. : "" ;
	NP_C. : "Request to VC2 ON at the beginning" ;
	CMD : XRT_STS_MODE_EXT ; 
	CMD : XRT_SCRIPT 00 03 02 7F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FF ; 
	CMD : XRT_STS_MODE_NORMAL ; 
	CMD : MDP_XRT_EXP_PAR_SET 11 00 0B 0C 80 80 20 20 03 28 00 ;
	CMD : XRT_FW_1_STATUS_LSB ; 
	CMD : XRT_FW_1_STATUS_MSB ; 
	CMD : MDP_XRT_EXP_STRT ; 
	CMD : MDP_XRT_EXP_PAR_SET 10 00 0B 0C 80 80 20 20 03 28 00 ;
	CMD : XRT_FW_1_STATUS_LSB ; 
	CMD : XRT_FW_1_STATUS_MSB ; 
	CMD : MDP_XRT_EXP_STRT ; 
	CMD : XRT_FW_1_STATUS_LSB ; 
	CMD : XRT_FW_1_STATUS_MSB ; 
	CMD : XRT_STS_MODE_EXT ; 
	CMD : XRT_SCRIPT 00 03 02 7E 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FF ; 
	CMD : XRT_STS_MODE_NORMAL ; 
	CMD : XRT_STBY ;
	CMD : XRT_OPERATE ;
	C. : "" ;
	C. : "***** For Emergency Use Only (Start) *****" ;
	CMD : XRT_FW1_RESET ; 
	CMD : XRT_STBY ;
	C. : "***** For Emergency Use Only (End) *****" ;
	C. : "" ;
	CMD : MDP_XRT_CTRL_MANU ;
	NP_CMD : MDP_XRT_MODE_STBY ; 
	NP_C. : "----------- Success Verify ?              OK / NG____" ;
	NP_C. : "" ;
	NP_C. : "XRT Obs. Table Upload" ;
	ENTRY: RAM MDP_OBS_X 291 291 ;
        NP_C. : "----------- Number of Commands = 39 bytes ?   OK / NG _____         " ;
	NP_C. : "" ;
	CMD : MDP_DUMP_XRTTBL 00 00 00 3A D4 ; 
	C. : "----------- Comparison Check ?                        OK / ERR ____         " ;
	NP_C. : "" ;
	NP_C. : "" ;
	CMD : MDP_XRT_ROI_SET 01 80 80 20 20 ;
	NP_CMD : MDP_XRT_ROI_SET 02 80 80 20 20 ;
	NP_CMD : MDP_XRT_ROI_SET 03 80 80 20 20 ;
	NP_CMD : MDP_XRT_ROI_SET 04 80 80 20 20 ;
	NP_CMD : MDP_XRT_ROI_SET 06 80 80 20 20 ;
	NP_CMD : MDP_XRT_ROI_SET 07 80 80 08 08 ;
	NP_CMD : MDP_XRT_ROI_SET 0f 80 80 06 06 ;
	NP_CMD : MDP_XRT_ROI_SET 10 80 80 04 04 ;
		NP_CMD : MDP_XRT_QT_PROG_SET 0e ;
		NP_CMD : MDP_XRT_FL_PROG_SET 0e ;
	NP_CMD : MDP_XRT_AEC_RESET ;
	NP_CMD : MDP_XRT_ARS_DIS ;
	NP_CMD : MDP_XRT_FLD_ENA ;
	NP_CMD : MDP_XRT_FLD_RESET ;
	NP_CMD : MDP_XRT_FLRCTRL_DIS ;
	NP_C. : "---------- Success Verify ?            OK / NG ____" ;
	NP_C. : "" ;
	NP_C. : "" ;
	C. : "All OK?   Yes--> Please Proceed. / No --> Stop here." ;
	NP_C. : "" ;
	CMD : MDP_XRT_MODE_OBSV ; 
	NP_CMD : MDP_XRT_CTRL_AUTO ;
	C. : "---------- Success Verify ?            OK / NG ____" ;
	NP_C. : "" ;
	NP_C. : "************ XRT END ***********" ;
}

DEFSEQ(OP): XRT_AR_on_disk_5_SEQ { 	OG : XRT_CTRL_MANU_434_OG ;
	INTERVAL: 98.0 ;
	OG : XRT_FOCUS_POSITION_439_OG ;
	INTERVAL: 20.0 ;
		OG : XRT_QT_PROG_SET_442_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_404_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_422_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_ENA_405_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLRCTRL_DIS_416_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_Synoptic_SEQ {
		OG : XRT_CTRL_MANU_444_OG ;
	INTERVAL: 98.0 ;
	OG : XRT_FOCUS_POSITION_426_OG ;
	INTERVAL: 20.0 ;
		OG : XRT_QT_PROG_SET_433_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_435_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_FLD_DIS_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLRCTRL_DIS_413_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_401_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_402_OG ;
}

DEFSEQ(OP): XRT_AR_on_disk_6_SEQ { 	OG : XRT_CTRL_MANU_434_OG ;
	INTERVAL: 98.0 ;
	OG : XRT_FOCUS_POSITION_439_OG ;
	INTERVAL: 20.0 ;
		OG : XRT_QT_PROG_SET_410_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_412_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_AEC_RESET_441_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_422_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_ENA_405_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLRCTRL_DIS_416_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_Synoptic_2_SEQ {
		OG : XRT_CTRL_MANU_444_OG ;
	INTERVAL: 98.0 ;
	OG : XRT_FOCUS_POSITION_426_OG ;
	INTERVAL: 20.0 ;
		OG : XRT_QT_PROG_SET_433_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_435_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_FLD_DIS_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLRCTRL_DIS_413_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_401_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_402_OG ;
}

DEFSEQ(OP): XRT_AR_on_disk_7_SEQ { 	OG : XRT_CTRL_MANU_434_OG ;
	INTERVAL: 98.0 ;
	OG : XRT_FOCUS_POSITION_439_OG ;
	INTERVAL: 20.0 ;
		OG : XRT_QT_PROG_SET_417_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_419_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_AEC_RESET_441_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_422_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_ENA_405_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLRCTRL_DIS_416_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_403_OG ;
}

DEFSEQ(OP): XRT_SSQ_SEQ {
		OG : XRT_CTRL_MANU_444_OG ;
	INTERVAL: 98.0 ;
	OG : XRT_FOCUS_POSITION_426_OG ;
	INTERVAL: 20.0 ;
		OG : XRT_QT_PROG_SET_414_OG ; 	INTERVAL: 2.0 ;
		OG : XRT_FL_PROG_SET_415_OG ; 	INTERVAL: 2.0 ;
	OG : XRT_ARS_DIS_401_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLD_DIS_400_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_FLRCTRL_DIS_413_OG ;
	INTERVAL: 2.0 ;
	OG : XRT_CTRL_AUTO_402_OG ;
}

DEFSEQ(OG) : XRT_FLD_DIS_400_OG {
	NUMBER : 400 ;
	CMD : MDP_XRT_FLD_DIS ;
}

DEFSEQ(OG) : XRT_ARS_DIS_401_OG {
	NUMBER : 401 ;
	CMD : MDP_XRT_ARS_DIS ;
}

DEFSEQ(OG) : XRT_CTRL_AUTO_402_OG {
	NUMBER : 402 ;
	CMD : MDP_XRT_CTRL_AUTO ;
}

DEFSEQ(OG) : XRT_CTRL_AUTO_403_OG {
	NUMBER : 403 ;
	CMD : MDP_XRT_CTRL_AUTO ;
}

DEFSEQ(OG) : XRT_FL_PROG_SET_404_OG { 	NUMBER : 404 ;
	CMD : MDP_XRT_FL_PROG_SET 0e ; 
}

DEFSEQ(OG) : XRT_FLD_ENA_405_OG {
	NUMBER : 405 ;
	CMD : MDP_XRT_FLD_ENA ;
}

DEFSEQ(OG) : XRT_DIAGNOSTIC_406_OG {
	NUMBER : 406 ;
	CMD : XRT_DIAGNOSTIC ;
}

DEFSEQ(OG) : XRT_Custom_407_OG {
	NUMBER : 407 ;
	CMD : XRT_FW_1_STATUS_LSB ; 
}

DEFSEQ(OG) : XRT_Custom_408_OG {
	NUMBER : 408 ;
	CMD : XRT_FW1_STEP_CW ; 
}

DEFSEQ(OG) : XRT_Custom_409_OG {
	NUMBER : 409 ;
	CMD : XRT_FW1_RESET ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_410_OG { 	NUMBER : 410 ;
	CMD : MDP_XRT_QT_PROG_SET 0a ; 
}

DEFSEQ(OG) : XRT_OPERATE_411_OG {
	NUMBER : 411 ;
	CMD : XRT_OPERATE ;
}

DEFSEQ(OG) : XRT_FL_PROG_SET_412_OG { 	NUMBER : 412 ;
	CMD : MDP_XRT_FL_PROG_SET 0a ; 
}

DEFSEQ(OG) : XRT_FLRCTRL_DIS_413_OG {
	NUMBER : 413 ;
	CMD : MDP_XRT_FLRCTRL_DIS ;
}

DEFSEQ(OG) : XRT_QT_PROG_SET_414_OG { 	NUMBER : 414 ;
	CMD : MDP_XRT_QT_PROG_SET 0d ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_415_OG { 	NUMBER : 415 ;
	CMD : MDP_XRT_FL_PROG_SET 0d ; 
}

DEFSEQ(OG) : XRT_FLRCTRL_DIS_416_OG {
	NUMBER : 416 ;
	CMD : MDP_XRT_FLRCTRL_DIS ;
}

DEFSEQ(OG) : XRT_QT_PROG_SET_417_OG { 	NUMBER : 417 ;
	CMD : MDP_XRT_QT_PROG_SET 01 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_418_OG {
	NUMBER : 418 ;
	CMD : MDP_XRT_QT_PROG_SET 12 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_419_OG { 	NUMBER : 419 ;
	CMD : MDP_XRT_FL_PROG_SET 01 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_420_OG {
	NUMBER : 420 ;
	CMD : MDP_XRT_QT_PROG_SET 14 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_421_OG {
	NUMBER : 421 ;
	CMD : MDP_XRT_FL_PROG_SET 14 ; 
}

DEFSEQ(OG) : XRT_ARS_DIS_422_OG {
	NUMBER : 422 ;
	CMD : MDP_XRT_ARS_DIS ;
}

DEFSEQ(OG) : XRT_QT_PROG_SET_423_OG {
	NUMBER : 423 ;
	CMD : MDP_XRT_QT_PROG_SET 06 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_424_OG {
	NUMBER : 424 ;
	CMD : MDP_XRT_FL_PROG_SET 12 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_425_OG {
	NUMBER : 425 ;
	CMD : MDP_XRT_FL_PROG_SET 06 ; 
}

DEFSEQ(OG) : XRT_FOCUS_POSITION_426_OG {
	NUMBER : 426 ;
	CMD : XRT_FOCUS_POSITION ff aa 00 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_427_OG {
	NUMBER : 427 ;
	CMD : MDP_XRT_QT_PROG_SET 09 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_428_OG {
	NUMBER : 428 ;
	CMD : MDP_XRT_FL_PROG_SET 09 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_429_OG {
	NUMBER : 429 ;
	CMD : MDP_XRT_QT_PROG_SET 05 ; 
}

DEFSEQ(OG) : XRT_CTRL_MANU_430_OG {
	NUMBER : 430 ;
	CMD : MDP_XRT_CTRL_MANU ;
}

DEFSEQ(OG) : XRT_FL_PROG_SET_431_OG {
	NUMBER : 431 ;
	CMD : MDP_XRT_FL_PROG_SET 05 ; 
}

DEFSEQ(OG) : XRT_Custom_432_OG {
	NUMBER : 432 ;
	CMD : XRT_FW1_STEP_CCW ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_433_OG { 	NUMBER : 433 ;
	CMD : MDP_XRT_QT_PROG_SET 0c ; 
}

DEFSEQ(OG) : XRT_CTRL_MANU_434_OG {
	NUMBER : 434 ;
	CMD : MDP_XRT_CTRL_MANU ;
}

DEFSEQ(OG) : XRT_FL_PROG_SET_435_OG { 	NUMBER : 435 ;
	CMD : MDP_XRT_FL_PROG_SET 0c ; 
}

DEFSEQ(OG) : XRT_Custom_436_OG {
	NUMBER : 436 ;
	CMD : XRT_FW1_RESET ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_437_OG {
	NUMBER : 437 ;
	CMD : MDP_XRT_QT_PROG_SET 0b ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_438_OG {
	NUMBER : 438 ;
	CMD : MDP_XRT_FL_PROG_SET 0b ; 
}

DEFSEQ(OG) : XRT_FOCUS_POSITION_439_OG {
	NUMBER : 439 ;
	CMD : XRT_FOCUS_POSITION fe 97 00 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_440_OG {
	NUMBER : 440 ;
	CMD : MDP_XRT_QT_PROG_SET 03 ; 
}

DEFSEQ(OG) : XRT_AEC_RESET_441_OG {
	NUMBER : 441 ;
	CMD : MDP_XRT_AEC_RESET ;
}

DEFSEQ(OG) : XRT_QT_PROG_SET_442_OG { 	NUMBER : 442 ;
	CMD : MDP_XRT_QT_PROG_SET 0e ; 
}

DEFSEQ(OG) : XRT_STANDBY_443_OG {
	NUMBER : 443 ;
	CMD : XRT_STBY ;
}

DEFSEQ(OG) : XRT_CTRL_MANU_444_OG {
	NUMBER : 444 ;
	CMD : MDP_XRT_CTRL_MANU ;
}

DEFSEQ(OG) : XRT_FLD_DIS_445_OG {
	NUMBER : 445 ;
	CMD : MDP_XRT_FLD_DIS ;
}

DEFSEQ(OG) : XRT_Custom_446_OG {
	NUMBER : 446 ;
	CMD : XRT_FW_1_STATUS_LSB ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_447_OG {
	NUMBER : 447 ;
	CMD : MDP_XRT_FL_PROG_SET 03 ; 
}

DEFSEQ(OG) : XRT_QT_PROG_SET_448_OG {
	NUMBER : 448 ;
	CMD : MDP_XRT_QT_PROG_SET 07 ; 
}

DEFSEQ(OG) : XRT_FL_PROG_SET_449_OG {
	NUMBER : 449 ;
	CMD : MDP_XRT_FL_PROG_SET 07 ; 
}